WAMCA 2021

12th Workshop on Applications for Multi-Core Architectures
October 26-29, 2021
Belo Horizonte, BRAZIL

Held in conjunction with the
33rd International Symposium on Computer Architecture and High Performance Computing (SBAC-PAD 2021)

Since the advent of the multi-core concept, significant advances have been made on many of the related aspects. Multi-core has become a natural element in the HPC ecosystem, and its pervasiveness within the landscape of common computing devices has made it a standard. Therefore, hardware and software concerns related to multi-core are good targets for computer science investigations, with a high potential for a genuine contribution. Beside the plethora of applications for which more powerful solutions are still expected, efficient implementation techniques for many-core chip processors are of keen interest. WAMCA is aiming at providing an opportunity to address all aforementioned technical challenges and more, including reports on specific case studies. This workshop is an opportunity for application designers and computer architects to discuss new techniques and emerging applications as well as their implications on current and next-generation many-core architectures. Authors are invited to submit manuscripts reporting a technical contribution on multi-core related topics. Aspects of interest include (but are not limited to):
  • Multithread parallelisation
  • Scalability issues
  • Case study
  • Hybrid parallelisation
  • NUMA manycore implementation
  • Benchmarking and runtime analysis
  • Frameworks and tools
  • Foundation of shared memory computing
Important Dates
  • Paper deadline : September 17, 2021 (EXTENDED !!!)
  • Author notification : September 24, 2021
  • Camera ready : September 30, 2021
  • PS: Due to the extension of the camera ready deadline, we are accepting new submissions until september 06, the corresponding papers will be directely considered for evaluation.

Submissions must be in English, 8 pages maximum, following the IEEE conference formatting guidelines (submission). All accepted papers will be published at IEEE Xplore and selected ones will be considered for a publication in top ranked HPC journal.

Dr. Leonel Souza(webpage), INESC Lisboa, Instituto Superior Técnico, Universidade de Lisboa
Abstract: In this talk, we will introduce the Cache-aware Roofline Model (CARM) and expose its basic principles when modelling the performance upper-bounds of a processor. We will also discuss our recent research contributions in extending the model insightfulness with application-driven CARM, as well as applying the CARM principles to model power consumption and energy-efficiency upper-bounds. We will show how the Intel®️ Advisor relies on the CARM implementation and how it can be used to detect execution bottlenecks and provide useful hints on which type of optimizations to apply in order to fully exploit device capabilities.
Bio: Leonel Sousa is Professor (“Professor Catedrático”) of the Electrical and Computer Engineering Department (DEEC) of Instituto Superior Técnico (IST), Universidade de Lisboa, in Portugal, and a Senior Researcher of INESC-ID, a non-profit research institute affiliated with IST. His research interests include high performance and parallel computing, and architectures for general purpose and specialized processors. He is Fellow of the IET-FIET (2013), Distinguished Scientist of ACM (2015), Senior Member of IEEE (2004), and Member of IFIP WG10.3 on concurrent systems.
General Chair
Claude Tadonki (MINES ParisTech - PSL)  (claude.tadonki@mines-paristech.fr)
Workshop Chairs
Cristiana Bentes (State University of Rio de Janeiro)
Gabriele Mencagli (University of Pisa - Italy)
Lucia Drummond (Fluminense Federal University)
Program Chairs
Maria Clicia Castro (State University of Rio de Janeiro)
Guido Araujo (State University of Campinas)
Phillippe Navaux (Federal University of Rio Grande do Sul)
Program Committee
Alexandre Gonçalves (IFRJ - Brazil)
Andre Rauber Du Bois (UFPEL - Brazil)
Corinne Ancourt (Mines ParisTech - France)
Denis Barthou (INRIA - France)
Diego Brandao (CEFET-RJ - Brazil)
Diego Dutra (UFRJ - Brazil)
Eyder Rios (UESPI - Brazil)
Guido Araujo (UNICAMP - Brazil)
Guilherme Cox (Rutgers University - US)
Henrique Freitas (PUC MG - Brazil)
Igor Machado (UERJ - Brazil)
Juliana Silva Zamith (UFRRJ - Brazil)
Khaled Ibrahim (Lawrence Berkeley National Lab - USA)
Konstantin Petrov (INRIA - France)
Leandro Marzulo (UERJ - Brazil)
Leonel Sousa (INESC-ID - Portugal)
Mauricio Pilla (UFPEL - Brazil)
Marcelo Zamith (UFRRJ - Brazil)
Marcin Paprzycki (IBS PAN and WSM - Poland)
Mitsuhisa Sato (RIKEN AICS / University of Tsukuba - Japan)
Rodolfo Azevedo (UNICAMP - Brazil)
Sandro Rigo (UNICAMP - Brazil)